Contemporary Processors

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What are contemporary processors?

We humans use our brain as our processor, however computational devices have contemporary processors.

Devices such as desktops, smartphones, or any form of device that receives and input and output have a processor. This processor can be referred to as the CPU (Central Processing Unit).

The CPU carries out logical and mathematical operations to process the input, which the user inserts and output which the user gets.

Year upon year, as the technological world develops, the architecture of processors inside devices also develops, from materials, to improved designs, these are characteristics which architects will consider to improve the efficiency and utilisation in devices.

Contemporary processors components

Processors are comprised from the following:

  • Central Processing Unit: Executes interactions of the computer program.
  • Control Unit: Controls the operation of the ALU, memory, and input/output, instructing them how to respond to the instructions from the program it had interpreted from the memory unit. The control unit directs the operations of the CPU by doing the following jobs:
    • Coordinating and controlling activities of the CPU
    • Managing data flow between other components and the CPU
    • Acknowledging and accepting the next instruction
    • Decoding instructions
    • Storing the resulting data back into a memory unit
  • Arithmetic and Logical Unit (ALU): Allows logical and arithmetic operations to be carried out such as addition and subtraction.
  • (Logical operators are: AND, OR, NOT, XOR)                       
  • Memory Unit: Consists of RAM, which is partitioned out and consists of an address and its contents, which are in binary form.
  • Registers: Small block that consists of a high-speed storage memory cells that store data before it is processed, all logical, arithmetic, and shift operations occur here.
  • The register consist of 5 components     
    • Program Counter (PC): Holds the address of the next instruction to be executed
    • Accumulator (ACC): Storage area of the resulting calculations  
    • Memory Address Register (MAR): Holds the address of a location that is to be read from or written to
    • Memory Data Register (MDR): Temporary storage location that stores data that has been read, or data that still needs to be written
    • Current Instruction Register (CIR): Area where the current instruction is being carried out. The operation is divided into operand and opcode.
  • Buses: These are a set of parallel wires, which connect components (two or more) inside the CPU. Within the CPU, there are three types of buses, and these are all referred to a a system bus. The types of buses are: Data bus, Control bus, and Address bus.
    • Data bus: This bus is referred to as a bi-directional bus, which means bits, can be carried in both ways. This bus is used to transport data and instructions between components.
    • Address bus: Transmits the memory address specifying where the relevant data needs to be sent or retrieved from.
    • Control bus: This is also a bi-directional used to transmit “control signals” between the internal and external components. It is used to coordinate the use of the address bus and data buss, furthermore it also provides a status information between system components.
  • Input/Outputs: Information passed from the user/information received by the user.
  • Assembly language: Assembly code uses mnemonics to present instructions, for instance SUB represents subtraction. This is a simplified way of representing machine code. Instructions are divided into two: operand and opcode in the current instruction register.
    • Operand: Contains data or the address of the data (where the operation will be performed)
    • Opcode: Specifies type of instruction to be executed
Contemporary Processors Image 1

What affects CPU performance?

There are three factors, which affect the CPU performance:

  • Clock speed
  • Number of cores
  • The “Amount” and “Type” of cache memory

Clock Speed:

  • Clock speed is the speed at which the CPU can execute a given cycle per second (Measured in Hertz).
  • The clock speed is an electronic device that generates signals so operations can occur, these signals switch from 0 and 1.
  • Increasing clock speed comes with its limitation however, because the higher the clock speed the more heat the CPU generates.

Number of Cores:

  • A core is an independent processor, which is able to compile its own fetch-execute cycle.
  • The more cores a computer has, the more fetch-execute cycle it can carry out at any given time.
  • Though having double the number of cores in a system doesn’t mean double the performance. This is because some cores could have a lower clock speed due to the temperature and size, so some speed can be lost as cores try to communicate with each other.
  • The reasoning behind this is because some programs are not made/utilised to take advantage efficiently of this design (i.e. increasing the number of cores).

Amount and type of cache memory:

  • Cache is a small amount of fast memory, which is directly connected to the CPU that can fetch recently used data.
  • As cache is filled up, the unused instructions are replaced to make use of recent data to be made more accessible.

Pipelining:

  • Pipelining is a process that involves improving the performance of the CPU. The process is completed by fetching, decoding, and executing cycles of three separate instructions at the same time.
  • Pipelining works best when the proceeding instruction is not dependent on the instruction before it, though it is achieved by holding the relevant data in a buffer in close vicinity to the CPU until it’s required. Therefore whilst one instruction is getting executed, another can be decoded and another can be fetched.

An example of pipelining is below:

StepFetchDecodeExecute
Step 1Instruction 1  
Step 2Instruction 2Instruction 1 
Step 3Instruction 3Instruction 2Instruction 1
Step 4Instruction 4Instruction 3Instruction 2

The reason for pipelining is that it is aimed to reduce the amount of CPU which is kept idle (not doing anything).

Pipelining is separated into two forms:

  • Instruction pipelining: Separates the instruction into fetching, decoding, and executing.
  • Arithmetic pipelining: Breaking down the arithmetic operations and overlapping them as they are performed.

Fetch-Decode-Execute Cycle:

Contemporary Processors Image 2

In order to complete an instruction, the program must run a fetch-decode-execute cycle (in this sequence).

Types of contemporary architectures/processors

Von Neumann:

  • The Von Neumann architecture was introduced in 1945, this computational architecture consists of a single shared memory unit where instructions and data are stored together.
  • The mechanism is carried out using a linear format, each cycle must completely finish, so the next one can begin, which can make programs be optimised for size.
  • During the past few decades as computational speed had increased compared to main memory access speed resulting in a significant performance gap. This is known as the Von Neumann bottleneck.
  • To solve the Von Neumann bottleneck, computer architects had developed an extension to the classical structure. This extension is referred to as “cache”, which was the addition of fast memory between the CPU and main memory, this inevitably allowed the CPU to retrieve recently used data faster.
  • Examples of Von Neumann include conventional PC’s and servers.

Harvard Architecture:

  • The term “Harvard Architecture” comes from the “Harvard Mark I” relay based computer. It was an IBM built electromechanical computer, which stored instructions on punched tape.
  • Harvard Architecture stores data and instructions in physically separate memory locations. This is especially beneficial when the memory units have different characteristics.
  • For instance, the user might only want “read only” permissions, whereas the data may be “read & write”.
  • This advantageous structure of having separate memory locations allows the next instruction to be carried out while the data is being written back to the RAM.
  • Examples of Harvard Architecture:
    • Speech and image processing systems
    • Mobile communication systems
    • Digital signal processingContemporary Processors Image 3
Contemporary Processors Image 4

The above are two types of processor architecture, however computer architectures can be categorised as either RISC or CISC.

Reduced instruction set computer (RISC)

  • RISC architectures were created around the 1980s. They were developed because it was realised that programs only use around 20% of the available instructions.
  • Therefore RISC was created as a means to increase efficiency in a computerised system.
  • However, as good as that seems, this means RISC architectures required a larger number of registers to access data at a faster rate when programs are being executed.
  • RISC architectures can only support a small number of simple instructions that can be executed and completed in a single clock cycle.
  • Therefore this means that individual instructions can be executed at a higher rate, however more instructions are needed to complete the task.

Complex instruction set computer (CISC)

  • CISC architectures can comprehend a large number of complicated instructions, though this means that instructions can take many cycles to complete, this is because one single CISC instruction could be made up of many RISC “standard” instructions, therefore CISC architectures require higher clock speeds than RISC.
  • CISC programs were very popular when programs were written in assembly language.

RISC and CISC compared:

RISCCISC
Simple and fewer instructionsLarge range of complex instructions made from simple instruction
Fewer addressing modesHas many addressing modes
Only LOAD and STORE instructions can have access to memoryMany instructions can access memory
Processor hardware is of simple structureProcessor structure is more complex

Although the above showcase differences between the two architectures, the main difference between RISC and CISC is the CPU time taken to execute a given program.

CPU execution time is calculated using this formula:

CPU time = (number of instruction) x (average cycles per instruction) x (seconds per cycle)

RISC architectures will shorten the execution time by reducing the average clock cycle per one instruction.

However, CISC architectures try to reduce execution time by reducing the number of instructions per program.

Multicore systems

To better equip processors for systems nowadays, it was necessary to increase the physical complexity of the CPU, rather than keeping the traditional Von Neumann architecture, which uses only a single processor to execute instructions.

To comply with modern day systems, CPU’s were revolutionised to allow architects to fit them with more transistors onto the same chip size.

This is referred to as a Moore’s Law, which had predicted within every two years, the number of transistors placed on a chip would double.

Though as architects and scientists reached the physical limit to place transistors on a silicon chip, it was mandatory to find other solutions to increase the power of systems. A very popular and successful way of doing this was by introducing multicore systems (computer with multiple processors).

The multicore system offers the capability to significantly reduce power consumption for a processor-based system. Small and simple processors are more efficient than complex larger ones.

Parallel systems:

Parallel systems are a commonly used type of multicore system. These are usually referred to as dual core processors (i.e. having two processors) or quad core processors (having four processors).

In parallel processing, two or more processors work simultaneously to preform a single task. This feature increases efficiency greatly by decreasing the time taken to execute any given program, however one thing to always place in mind is that, for this to work effectively, the programs must be specially written to take advantage of these systems.

Co-processors

Co-processors are another common way of utilising multicore processor systems. Similarly like parallel systems, co-processors implementation involves adding another processor to the system, however the difference is that in a co-processor, the added processor will be responsible to carry out only a specific task, for instance, mathematical operations or graphics processing.

Advantages and disadvantages of multicore processors

AdvantagesDisadvantages
Programs are executed faster, this means more jobs can be done in shorter amount of timeWith multicore systems, each task must be ensured that it has correct input data to work on, this means  it can be difficult to write programs for such systems.
Program tasks can be shared to reduced the work load on a single processor, which avoid bottlenecksThe results from different processors need to be all combined at the end of processing. This can increase the time to execute a program.
 Not every task can be split across multiple processors

Summary & Facts

Processors are a component in the device, which receive user input and carry out logical and mathematical data to produce the desired output.

Contemporary processors use a combination of Von Neumann and Harvard architecture. Von Neumann architecture is used when working in the main memory with data and instructions, though uses Harvard architecture to divide the cache into instruction cache and data cache.

Other architectures also include Reduced instruction set computer (RISC) and Complex instruction set computer (CISC).

To increase the productivity and efficiency, architects have introduced multicore processors in systems. This means that a system can have two or more processors.

The components of a processor are as the following:

  • Central Processing Unit
  • Control Unit
  • Arithmetic and Logical Unit (ALU)
  • Memory Unit
  • Registers:
    • Program Counter (PC)
    • Accumulator (ACC)
    • Memory Address Register (MAR)
    • Memory Data Register (MDR)
    • Current Instruction Register (CIR)
  • Buses:
    • Data bus
    • Address bus
    • Control bus
  • Input/Outputs
  • Assembly language
    • Operand
    • Opcode

The three main factors affecting CPU performance are:

  • Clock speed
  • Number of cores
  • The “Amount” and “Type” of cache memory
  • Pipelining
    • Instruction pipelining
    • Arithmetic pipelining

In order to complete an instruction, the program must run a fetch-decode-execute cycle (in this sequence).

The types of contemporary architectures/processors are:

  • Von Neumann Architecture:
    • Von Neumann architecture uses a single shared memory unit where instructions and data are stored together.
    • Due to the performance gap between main memory access and computational speed, architects had created an extension referred to as a “cache”. This allowed the CPU to retrieve recently used data quicker. This is known as the Von Neumann bottleneck.
    • Advantages of Von Neumann Architecture:
      • Cheap to develop as the control unit can be designed easier.
      • Programs can be optimised in size
  • Harvard Architecture:
    • Harvard Architecture stores data and instructions in physically separate memory locations.
    • Advantages of Harvard Architecture:
      • Data and instructions can flow in parallel, this means a quicker execution
      • Space can be better utilised as memories can be different sizes

Reduced instruction set computer (RISC)

Uses software to compile and translate high-level code into short and executable, lines of code.

RISC processors are often found in portable devices, i.e. power banks.

Complex instruction set computer (CISC)

Complicated hardware requires a large instruction set to be built into the CPU. Therefore this allows it to be able to comprehend complicated instructions, which means less code to be written.

CISC processors are often found in desktop computers, any device that is big, requires power, and generates a lot of heat.

Multicore systems

The multicore system offers the capability to significantly reduce power consumption for a processor based system, this is done by adding multiple processors to a system to increase its efficiency, however the downside of using multicore systems are that not all tasks can be split across multiple processors.

Parallel systems:

In parallel processing, two or more processors work simultaneously to preform a single task. This increases efficiency to execute a program faster.

Co-processors

In co-processors the added processor will be responsible to carry out only a specific task.

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